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IEEE International Workshop on Defects, Adaptive Test, Yield and Data Analysis (DATA-2015)
Oct 8-9 2015
Disneyland Hotel, Anaheim, CA |
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Program |
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Thursday, October 8, 2015 |
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4:00 p.m. - 4:30 p.m. |
Registration |
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4:30 p.m. - 4:40 p.m. |
Opening Remarks - Arani Sinha, (General Chair) & Jennifer Dworak (Program Chair) |
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4:40 p.m. - 5:40 p.m. |
Keynote Address - John Kibarian, CEO, PDF Solutions |
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5:45 p.m. - 7:00 p.m. |
Panel "Information exchange in the fabless-foundry ecosystem" Moderator: Debbora Ahlgren, Feldman Engineering |
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7:00 p.m. - 9:00 p.m. |
Reception |
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Friday, October 9, 2015 |
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7:00 a.m. - 8:00 a.m. |
Breakfast |
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8:00 a.m. - 8:30 a.m. |
Invited Talk: "Outlier Analysis - What in Practice We Usually Don't Know for Sure" Li-C Wang, University of California, Santa Barbara |
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8:30 a.m. - 9:00 a.m. |
Invited Talk: "Mapping of Domain Knowledge and Analytic Skills into Big Data Analysis Systems for the Acceleration of Yield Learning" Dirk de Vries, CTO, Qualtera |
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9:00 a.m. - 10:00 a.m. |
Distinguished Speaker: "Accelerated yield learning in advanced process nodes" Mike Campbell, Senior VP, Qualcomm |
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10:00 a.m. - 10:30 a.m. |
Break |
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10:30 a.m. - 11:50 a.m. |
Technical Presentations 1: • "An Autonomous and Scalable Scan-based Diagnosis System for Rapid Yield Learning in a Fabless-Foundry model" Murthy, P. Somasundaram, A. Guettaf, S. Lu, D. Wee, G. Eves (Broadcom) • "Implementing the CAST Test Event Messaging Standard" K. Thomas (Teradyne) & S. McDowall (Galaxy Semiconductor) • "Memory BIST optimization using Adaptive techniques for SoCs" D. Kobla, D. Offutt, & S. Menon (Intel) • "Filling a Gap in Board-Level At-Speed Test Coverage" A. Jutman (Testonica Lab) |
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Noon - 1:00 p.m. |
Lunch |
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1:00 p.m. - 1:30 p.m. |
Demos |
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1:30 p.m. - 2:30 p.m. |
Technical Presentations 2: • "Compensating for Data Errors in Adaptive Test Feed-Forward" J. Roehr, M. Pate, & J. Wilson (Texas Instruments) • "Identification of Fab Process Anomalies Using Near Neighborhood Residual Outlier Detection Enhanced with a Site Bias Correcting Neighborhood Selection Method" G. Ibrahim, G. Claudi-Magnussen (Skyworks Solutions), K. Rutz, & W. Smith (Galaxy Semiconductor) |
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2:30 p.m. - 2:50 p.m. |
Break |
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2:50 p.m. - 3:50 p.m. |
Technical Presentations 3: • "Optimizing In-Circuit-Test Cost using Machine Learning and Test Sampling" B. Waggle, T. Lin, and B. Eklow (Cisco) • "A novel test method for detecting manufacturing defects on circuits based on DFM rule check" T. Chakraborty (Qualcomm) |
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3:50 p.m. - 4:00 p.m. |
Closing Remarks |
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